| 전자부품 데이터시트 검색엔진 |
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PIC17C752-08/CL 데이터시트(PDF) 258 Page - Microchip Technology |
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PIC17C752-08/CL 데이터시트(HTML) 258 Page - Microchip Technology |
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258 / 328 page ![]() PIC17C7XX DS30289A-page 258 Preliminary © 1998 Microchip Technology Inc. FIGURE 20-15: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING TABLE 20-15: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS FIGURE 20-16: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING TABLE 20-16: USART SYNCHRONOUS RECEIVE REQUIREMENTS Param No. Sym Characteristic Min Typ † Max Units Conditions 120 TckH2dtV SYNC XMIT (MASTER & SLAVE) Clock high to data out valid PIC17CXXX — — 50 ns PIC17LCXXX — — 75 * ns 121 TckRF Clock out rise time and fall time (Master Mode) PIC17CXXX — — 25 ns PIC17LCXXX — — 40 * ns 122 TdtRF Data out rise time and fall time PIC17CXXX — — 25 ns PIC17LCXXX — — 40 * ns * Characterized but not tested. † Data in “Typ” column is at 5V, 25 ∞C unless otherwise stated.These parameters are for design guidance only and are not tested. Param No. Sym Characteristic Min Typ † Max Units Conditions 125 TdtV2ckL SYNC RCV (MASTER & SLAVE) Data setup before CK ↓ (DT setup time) 15 — — ns 126 TckL2dtl Data hold after CK ↓ (DT hold time) 15 — — ns † Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. 121 121 120 122 TX/CK RX/DT pin pin 125 126 TX/CK RX/DT pin pin |
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