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PIC17C752-08/CL 데이터시트(PDF) 26 Page - Microchip Technology |
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PIC17C752-08/CL 데이터시트(HTML) 26 Page - Microchip Technology |
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26 / 328 page ![]() PIC17C7XX DS30289A-page 26 © 1998 Microchip Technology Inc. Bank 1 DDRC (5) 10h 1111 1111 1111 1111 uuuu uuuu PORTC (4, 5) 11h xxxx xxxx uuuu uuuu uuuu uuuu DDRD (5) 12h 1111 1111 1111 1111 uuuu uuuu PORTD (4, 5) 13h xxxx xxxx uuuu uuuu uuuu uuuu DDRE (5) 14h ---- 1111 ---- 1111 ---- uuuu PORTE (4, 5) 15h ---- xxxx ---- uuuu ---- uuuu PIR1 16h x000 0010 u000 0010 uuuu uuuu(1) PIE1 17h 0000 0000 0000 0000 uuuu uuuu Bank 2 TMR1 10h xxxx xxxx uuuu uuuu uuuu uuuu TMR2 11h xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 12h xxxx xxxx uuuu uuuu uuuu uuuu TMR3H 13h xxxx xxxx uuuu uuuu uuuu uuuu PR1 14h xxxx xxxx uuuu uuuu uuuu uuuu PR2 15h xxxx xxxx uuuu uuuu uuuu uuuu PR3/CA1L 16h xxxx xxxx uuuu uuuu uuuu uuuu PR3/CA1H 17h xxxx xxxx uuuu uuuu uuuu uuuu Bank 3 PW1DCL 10h xx-- ---- uu-- ---- uu-- ---- PW2DCL 11h xx0- ---- uu0- ---- uuu- ---- PW1DCH 12h xxxx xxxx uuuu uuuu uuuu uuuu PW2DCH 13h xxxx xxxx uuuu uuuu uuuu uuuu CA2L 14h xxxx xxxx uuuu uuuu uuuu uuuu CA2H 15h xxxx xxxx uuuu uuuu uuuu uuuu TCON1 16h 0000 0000 0000 0000 uuuu uuuu TCON2 17h 0000 0000 0000 0000 uuuu uuuu TABLE 5-4: INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS (Cont.’d) Register Address Power-on Reset Brown-out Reset MCLR Reset WDT Reset Wake-up from SLEEP through interrupt Legend: u = unchanged, x = unknown, - = unimplemented read as '0', q = value depends on condition. Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt vector. 3: See Table 5-3 for reset value of specific condition. 4: This is the value that will be in the port output latch. 5: When the device is configured for microprocessor or externded microcontroller mode, the operation of this port does not rely on these registers 6: On any device reset, these pins are configured as inputs. |
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