PIC17C752-08SLASHCL datasheet(173/328 Pages) MICROCHIP

173 / 328 page

DS30289A-page 173

PIC17C7XX

15.3

Connection Considerations for I2C

Bus

For standard-mode I2C bus devices, the values of

resistors

Rp Rsin Figure 15-45 depends on the follow-

ing parameters

• Supply voltage

• Bus capacitance

• Number of connected devices (input current +

leakage current).

The supply voltage limits the minimum value of resistor

Rp due to the speciﬁed minimum sink current of 3 mA

at VOL max = 0.4V for the speciﬁed output stages. For

example, with a supply voltage of VDD = 5V+10% and

VOL max = 0.4V at 3 mA, Rp min = (5.5-0.4)/0.003 =

1.7 k

Ω. VDD as a function of R

is shown in

Figure 15-45. The desired noise margin of 0.1VDD for

the low level, limits the maximum value of

Rs. Series

resistors are optional and used to improve ESD sus-

ceptibility.

The bus capacitance is the total capacitance of wire,

connections, and pins. This capacitance limits the max-

imum value of

Rp due to the speciﬁed rise time

(Figure 15-45).

The SMP bit is the slew rate control enabled bit. This bit

is in the SSPSTAT register, and controls the slew rate

of the I/O pins when in I2C mode (master or slave).

FIGURE 15-45: SAMPLE DEVICE CONFIGURATION FOR I2C BUS

VDD + 10%

SDA

SCL

NOTE: I

C devices with input levels related to VDD must have one common supply

line to which the pull up resistor is also connected.

DEVICE

Cb=10 - 400 pF

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