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MT4LC4M4E8DJS 데이터시트(PDF) 8 Page - Micron Technology

부품명 MT4LC4M4E8DJS
상세설명  4 MEG x 4 EDO DRAM
PDF  23 Pages
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제조업체  MICRON [Micron Technology]
홈페이지  http://www.micron.com
Logo MICRON - Micron Technology

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4 Meg x 4 EDO DRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D47.pm5 – Rev. 3/97
©1997, Micron Technology, Inc.
8
4 MEG x 4
EDO DRAM
TECHNOLOGY, INC.
AC ELECTRICAL CHARACTERISTICS
(Notes: 2, 3, 9, 10, 11, 12, 17) (VCC [MIN]
≤ VCC ≤ VCC [MAX])
AC CHARACTERISTICS
-5
-6
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
NOTES
Access time from column address
tAA
25
30
ns
Column address setup to CAS# precharge
tACH
12
15
ns
Column address hold time (referenced to RAS#)
tAR
38
45
ns
Column address setup time
tASC
0
0
ns
Row address setup time
tASR
0
0
ns
Column address to WE# delay time
tAWD
42
49
ns
13
Access time from CAS#
tCAC
13
15
ns
14
Column address hold time
tCAH
8
10
ns
CAS# pulse width
tCAS
8
10,000
10
10,000
ns
CAS# LOW to “don’t care” during Self Refresh
tCHD
15
15
ns
CAS# hold time (CBR Refresh)
tCHR
8
10
ns
7
CAS# to output in Low-Z
tCLZ
0
0
ns
Data output hold after next CAS# LOW
tCOH
3
3
ns
CAS# precharge time
tCP
8
10
ns
15
Access time from CAS# precharge
tCPA
28
35
ns
CAS# to RAS# precharge time
tCRP
5
5
ns
CAS# hold time
tCSH
38
45
ns
CAS# setup time (CBR Refresh)
tCSR
5
5
ns
CAS# to WE# delay time
tCWD
28
35
ns
13
Write command to CAS# lead time
tCWL
8
10
ns
Data-in hold time
tDH
8
10
ns
16
Data-in setup time
tDS
0
0
ns
16
Output disable
tOD
0
12
0
15
ns
Output Enable
tOE
12
15
ns
17
OE# hold time from WE# during
tOEH
8
10
ns
18
READ-MODIFY-WRITE cycle
OE# HIGH hold from CAS# HIGH
tOEHC
5
10
ns
18
OE# HIGH pulse width
tOEP
5
5
ns
OE# LOW to CAS# HIGH setup time
tOES
4
5
ns
Output buffer turn-off delay
tOFF
0
12
0
15
ns
20
CAPACITANCE
PARAMETER
SYMBOL
MAX
UNITS
NOTES
Input Capacitance: Address pins
CI1
5pF
8
Input Capacitance: RAS#, CAS#, WE#, OE#
CI2
7pF
8
Input/Output Capacitance: DQ
CIO
7pF
8



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