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AX5243 데이터시트(PDF) 32 Page - ON Semiconductor |
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AX5243 데이터시트(HTML) 32 Page - ON Semiconductor |
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32 / 65 page ![]() Circuit Description www.onsemi.com AX5243 32 Registers Register Remarks DECIMATION This register programs the bandwidth of the digital channel filter. RXDATARATE2… RXDATARATE0 These registers specify the receiver bit rate, relative to the channel filter bandwidth. MAXDROFFSET2…MAXDROFFSET0 These registers specify the maximum possible data rate offset. MAXRFOFFSET2…MAXRFOFFSET0 These registers specify the maximum possible RF frequency offset. TIMEGAIN,DRGAIN These registers specify the aggressiveness of the receiver bit timing recovery. More aggressive settings allow the receiver to synchronize with shorter preambles, at the expense of more timing jitter and thus a higher bit error rate at a given signal-to-noise ratio. MODULATION This register selects the modulation to be used by the transmitter and the receiver, i.e. whether ASK, FSK should be used. PHASEGAIN, FREQGAINA, FREQGAINB, FREQGAINC, FREQGAIND, AMPLGAIN These registers control the bandwidth of the phase, frequency offset and amplitude tracking loops. AGCGAIN This register controls the AGC (automatic gain control) loop slopes, and thus the speed of gain adjustments. The faster the bit-rate, the faster the AGC loop should be. TXRATE These registers control the bit rate of the transmitter. FSKDEV These registers control the frequency deviation of the transmitter in FSK mode. The receiver does not explicitly need to know the frequency deviation, only the channel filter bandwidth has to be set wide enough for the complete modulation to pass. |
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