GP2015

15

Fig. 14 On-chip Phase-locked-loop Synthesiser Phase-detector gain

CASE TEMP(

°C)

3

3.5

4

4.5

5

5.5

6

-60

-40

-20

0

20

40

60

80

100

120

Vcc = +2.65V

Vcc = +3.8V

Vcc = +5.55V

Fig. 15 On-chip Phase-locked-loop Synthesiser - LOW and HIGH limits of VCO frequency for PLL to be locked

(Note that this a typical characteristic and cannot be guaranteed)

CASE TEMP(

°C)

1000

1100

1200

1300

1400

1500

1600

-60

-40

-20

0

20

40

60

80

100

120

LOW - 2.65V

HIGH - 2.65V

LOW - 3.8V

HIGH - 3.8V

LOW - 5.55V

HIGH - 5.55V

NOTE:- 1400MHz is the nominal VCO frequency