ATmega16 datasheet(208/315 Pages) ATMEL

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208

ATmega16(L)

2466E–AVR–10/02

Offset Compensation

Schemes

The gain stage has a built-in offset cancellation circuitry that nulls the offset of differen-

tial measurements as much as possible. The remaining offset in the analog path can be

measured directly by selecting the same channel for both differential inputs. This offset

residue can be then subtracted in software from the measurement results. Using this

kind of software based offset correction, offset on any channel can be reduced below

one LSB.

ADC Accuracy Definitions

An n-bit single-ended ADC converts a voltage linearly between GND and V

REF in 2

steps (LSBs). The lowest code is read as 0, and the highest code is read as 2n-1.

Several parameters describe the deviation from the ideal behavior:

•

Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal

transition (at 0.5 LSB). Ideal value: 0 LSB.

Figure 107. Offset Error

•

Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the

last transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below

maximum). Ideal value: 0 LSB

Figure 108. Gain Error

Output Code

VREF Input Voltage

Ideal ADC

Actual ADC

Offset

Error

Output Code

VREF Input Voltage

Ideal ADC

Actual ADC

Gain

Error

ATMEGA16 데이터시트(PDF) 208 Page - ATMEL Corporation