AS3955 datasheet(63/111 Pages) AMSCO

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ams Datasheet

Page 63

[v1-01] 2015-Apr-29

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AS3955 − Detailed Description

SPI Timing

Figure 66:

SPI Timing

Note(s) and/or Footnote(s):

1. TSCLK=TSCLKL+TSCLKH, during EEPROM read the SCLK period has to be increased to 1μs (this limitation is imposed by EEPROM read

access time)

Figure 67:

SPI General Timing

Symbol

Parameter

Min

Typ

Max

Unit

Note

General timing (VDD=VDD_IO=VDD_D= 3.3V, Temperature 25°C)

TSCLK

SCLK period

200

(1)

TSCLKL

SCLK low

TSCLKH

SCLK high

TSSH

SPI reset (/SS high)

TNCSL

/SS falling to SCLK rising

first SCLK pulse

TNCSH

SCLK falling to /SS rising

last SCLK pulse

TDIS

Data in setup time

TDIH

Data in hold time

Read timing (VDD=VDD_IO=VDD_D= 3.3V, Temperature 25°C, Cload≤50pF)

TDOD

Data out delay

TDOHZ

Data out to high

impedance delay

...

DIS

DIH

DATAI

...

t NCSH

SCLKH

SCLKL

/SS

MOSI

MISO

SCLK

NCSL

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