USB3300 datasheet(9/53 Pages) MICROCHIP

9 / 53 page

 2014-2015 Microchip Technology Inc.

DS00001783B-page 9

USB3300

DATA[7]

I/O,

CMOS,

Pull-low

N/A

8-bit bi-directional data bus. Bus ownership is

determined by DIR. The Link and PHY initiate data

transfers by driving a non-zero pattern onto the data

bus. ULPI defines interface timing for a single-edge

data transfers with respect to rising edge of CLKOUT.

DATA[7] is the MSB and DATA[0] is the LSB.

DATA[6]

I/O,

CMOS,

Pull-low

N/A

DATA[5]

I/O,

CMOS,

Pull-low

N/A

DATA[4]

I/O,

CMOS,

Pull-low

N/A

DATA[3]

I/O,

CMOS,

Pull-low

N/A

DATA[2]

I/O,

CMOS,

Pull-low

N/A

DATA[1]

I/O,

CMOS,

Pull-low

N/A

DATA[0]

I/O,

CMOS,

Pull-low

N/A

VDD3.3

Power

N/A

A 0.1uF bypass capacitor should be connected

between this pin and the ground plane on the PCB.

VDD1.8

Power

N/A

1.8V for digital circuitry on chip. Supplied by On-Chip

Regulator when REG_EN is active. When using the

internal regulators, place a 4.7uF low-ESR capacitor

near this pin and connect the capacitor from this pin

to ground. Connect pin 26 to pin 15. Do not connect

VDD1.8 to VDDA1.8 when using internal regulators.

When the regulators are disabled, pin 29 may be

connected to pins 26 and 15.

Output,

Analog

N/A

Crystal pin. If using an external clock on XI this pin

should be floated.

Input,

Analog

N/A

Crystal pin. A 24MHz crystal is supported. The crystal

is placed across XI and XO. An external 24MHz clock

source may be driven into XI in place of a crystal.

VDDA1.8

Power

N/A

1.8V for analog circuitry on chip. Supplied by On-Chip

Regulator when REG_EN is active. Place a 0.1uF

capacitor near this pin and connect the capacitor from

this pin to ground. When using the internal regulators,

place a 4.7uF low-ESR capacitor near this pin in

parallel with the 0.1uF capacitor. Do not connect

VDD1.8A to VDD1.8 when using internal regulators.

When the regulators are disabled, pin 29 may be

connected to pins 26 and 15.

VDD3.3

Power

N/A

Analog 3.3 volt supply. A 0.1uF low ESR bypass

capacitor connected to the ground plane of the PCB is

recommended.

TABLE 3-1:

USB3300 PIN DEFINITIONS 32-PIN QFN PACKAGE (CONTINUED)

Name

Direction,

Type

Active

Level

Description

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