| 전자부품 데이터시트 검색엔진 |
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TS3USB3000RLSR 데이터시트(PDF) 18 Page - Texas Instruments |
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TS3USB3000RLSR 데이터시트(HTML) 18 Page - Texas Instruments |
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18 / 26 page ![]() 1 2 3 4 USB– MHL– 9 SEL VCC D+ OE LEGEND VIA to Power Plane VIA to GND Plane Polygonal Copper Pour 8 7 6 Bypass Capacitor V+ 5 D– 10 MHL+ GND USB+ To Microcontroller To Microcontroller To USB connector USB port MHL port Signal 1 GND Plane Power Plane Signal 2 TS3USB3000 SCDS337B – DECEMBER 2012 – REVISED DECEMBER 2015 www.ti.com Layout Guidelines (continued) Due to high frequencies associated with the USB, a printed circuit board with at least four layers is recommended; two signal layers separated by a ground and power layer as shown in Figure 34. Figure 34. Four-Layer Board Stack-Up The majority of signal traces must run on a single layer, preferably Signal 1. Immediately next to this layer should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing the number of signal vias reduces EMI by reducing inductance at high frequencies. 11.2 Layout Example Figure 35. Package Layout Diagram 18 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TS3USB3000 |
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