STM32F401CB datasheet(28/134 Pages) STMICROELECTRONICS

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STM32F401xB STM32F401xC

Functional overview

3.19.5

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

downcounter. It features:

•

A 24-bit downcounter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source.

3.20

Inter-integrated circuit interface (I2C)

Up to three I2C bus interfaces can operate in multimaster and slave modes. They can

support the standard (up to 100 kHz) and fast (up to 400 kHz) modes. The I2C bus

frequency can be increased up to 1 MHz. For more details about the complete solution,

please contact your local ST sales representative.They also support the 7/10-bit addressing

mode and the 7-bit dual addressing mode (as slave). A hardware CRC

generation/verification is embedded.

They can be served by DMA and they support SMBus 2.0/PMBus.

The devices also include programmable analog and digital noise filters (see Table 5).

3.21

Universal synchronous/asynchronous receiver transmitters

(USART)

The devices embed three universal synchronous/asynchronous receiver transmitters

(USART1, USART2 and USART6).

These three interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to

communicate at speeds of up to 10.5 Mbit/s. The USART2 interface communicates at up to

5.25 bit/s.

USART1 and USART2 also provide hardware management of the CTS and RTS signals,

Smart Card mode (ISO 7816 compliant) and SPI-like communication capability. All

interfaces can be served by the DMA controller.

Table 5. Comparison of I2C analog and digital filters

Analog filter

Digital filter

Pulse width of

suppressed spikes

≥ 50 ns

Programmable length from 1 to 15 I2C peripheral clocks

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