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STM32F479AI 데이터시트(PDF) 136 Page - STMicroelectronics

부품명 STM32F479AI
상세설명  8- to 14-bit parallel camera interface up to 54 Mbytes
PDF  208 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM32F479AI 데이터시트(HTML) 136 Page - STMicroelectronics

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Electrical characteristics
STM32F479xx
136/208
DocID028010 Rev 2
5.3.21
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 58).
Unless otherwise specified, the parameters given in Table 61 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 17.
Figure 39. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 61. Otherwise the reset is not taken into account by the device.
Table 61. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RPU
Weak pull-up equivalent resistor(1)
VIN = VSS
30
40
50
k
Ω
VF(NRST)(2) NRST Input filtered pulse
-
-
-
100
ns
VNF(NRST)(2) NRST Input not filtered pulse
VDD > 2.7 V
300
-
-
TNRST_OUT Generated reset pulse duration
Internal Reset source
20
-
-
µs
1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance must be minimum
(~10% order)
.
2. Guaranteed by design.



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