ACE24C128B/256B/512B

Two-wire Serial EEPROM

VER 1.4

4

Pin Descriptions

Device/Page Addresses (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wire for the ACE24C128B/256B/512B.

Eight 128K/256K/512K devices may be addressed on a single bus system (device addressing is

discussed in detail under the Device Addressing section).

Serial Data (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be

wire-ORed with any number of other open-drain or open- collector devices.

Serial Clock (SCL):

The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock

data out of each device.

Write Protect (WP):

The ACE24C128B/256B/512B has a Write Protect pin that provides hardware data protection. The Write

Protect pin allows normal read/write operations when connected to ground (GND). When the Write

Proection pin is connected to Vcc, the write protection feature is enabled and operates as shown in the

following Table 2.

Write Protect Description

WP Pin Status

Part of the Array Protected

ACE24C128B

ACE24C256B

ACE24C512B

Full (128K) Array

Full (256K) Array

Full (512K) Array

At GND

Normal Read / Write Operations

Table 2

Memory Organization

ACE24C128B, 128K SERIAL EEPROM:

Internally organized with 256 pages of 64 bytes each, the 128K requires an 14-bit data word address for

random word addressing.

ACE24C256B, 256K SERIAL EEPROM:

Internally organized with 512 pages of 64 bytes each, the 256K requires an 15-bit data word address for

random word addressing.

ACE24C512B, 512K SERIAL EEPROM:

Internally organized with 512 pages of 128 bytes each, the 512K requires an 16-bit data word address

for random word addressing.