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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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GS6151 데이터시트(PDF) 34 Page - Semtech Corporation |
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GS6151 데이터시트(HTML) 34 Page - Semtech Corporation |
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34 / 77 page  GS6151 Final Data Sheet Rev.4 PDS-060389 August 2015 34 of 77 Semtech Proprietary & Confidential www.semtech.com Inter-command delay time tcmd 4 120.0 — — ns Inter-command delay time (after GSPI configuration write) tcmd_GSPI_ conf1 5 162.0 — — ns SDO after SCLK falling edge t6 —— 7.5 ns CS high after final SCLK falling edge t7 0.0 — — ns Input data hold time t8 1.0 — — ns CS high time t9 57.0 — — ns SDIN to SDOUT combinational delay —— 5.0 ns Max. chips daisy chained at max SCLK frequency When host clocks in SDOUT data on rising edge of SCLK —— 1 GS6151 chips Max. frequency for 32 daisy-chained devices —— 2.1 MHz Max. chips daisy-chained at max. SCLK frequency When host clocks in SDOUT data on falling edge of SCLK —— 3 GS6151 chips Max. frequency for 32 daisy-chained devices —— 2.2 MHz Note: 1. tcmd_GSPI_conf inter-command delay must be used whenever modifying HOST_CONFIG register at address 0x00 Table 4-8: GSPI Timing Parameters (Continued) Parameter Symbol Equivalent SCLK Cycles (at 27MHz) Min Typ Max Units |
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