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UCS2112 데이터시트(PDF) 27 Page - Microchip Technology

부품명 UCS2112
상세설명  USB Dual-Port Power Switch and Current Monitor
PDF  64 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

UCS2112 데이터시트(HTML) 27 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS20005424B-page 27
UCS2112
7.0
USB PORT POWER SWITCH
To
assure
compliance
to
various
charging
specifications, the UCS2112 contains a USB port
power switch that supports two current-limiting modes:
Trip and Constant current (variable slope). The current
limit (ILIM) is pin selectable (and may be updated via
the register set). The switch also includes soft start
circuitry and a separate short circuit current limit.
The port power switch is on in the Active state (except
when VBUS is discharging).
7.1
Current Limiting
7.1.1
CURRENT LIMIT SETTING
The UCS2112 hardware set current limit, ILIM, can be
one of eight values. This resistor value is read once
upon UCS2112 power-up. The current limit can be
changed via the SMBus/I2C after power-up; however,
the programmed current limit cannot exceed the hard-
ware set current limit. Unless connected to VDD, the
resistors in Table 7-1 are pull-down resistors.
At power-up, the communication mode (Stand-alone
or SMBus/I2C) and hardware current limit (ILIM) are
determined via the pull-down resistor (or pull-up resis-
tor if connected to VDD) on the COMM_ILIM pin, as
shown in Table 7-1.
7.1.2
SHORT CIRCUIT OUTPUT
CURRENT LIMITING
Short circuit current limiting occurs when the output
current is above the selectable current limit (ILIMx).
This event will be detected and the current will imme-
diately be limited (within tSHORT_LIM time). If the condi-
tion remains, the port power switch will flag an Error
condition and enter the Error state.
7.1.3
SOFT START
When the PWR_EN control changes states to enable the
port power switch, or an Attach Detection event occurs in
the Detect power state and the PWR_EN control is
already enabled, the UCS2112 invokes a soft start rou-
tine for the duration of the VBUS rise time (tR_BUS). This
soft start routine will limit current flow from VS into VBUS
while it is active. This circuitry will prevent current spikes
due to a step in the portable device current draw.
In the case when a portable device is attached while the
PWR_EN pin is already enabled, if the bus current
exceeds ILIM, the UCS2112 current limiter will respond
within a specified time (tSHORT_LIM) and will operate nor-
mally at this point. The CBUS capacitor will deliver the
extra current, if any, as required by the load change.
7.1.4
CURRENT LIMITING MODES
The UCS2112 current limiting has two modes: trip and
constant current (variable slope). Either mode func-
tions at all times when the port power switch is closed.
When operating in the Detect power state, the current
capacity at VBUS is limited to IBUS_BYP as described in
Section 6.1.1 “VBUS Bypass Switch”
.
7.1.4.1
Trip Mode
When using trip current limiting, the UCS2112 USB
port power switch functions as a low resistance switch
and rapidly turns off if the current limit is exceeded.
While operating using trip current limiting, the VBUS
output voltage will be held relatively constant (equal to
the VS voltage minus the RON xIBUS current) for all
current values up to the ILIM.
If the current drawn by a portable device exceeds ILIM,
the following occurs:
1.
The port power switch will be turned off (Trip
action).
2.
The UCS2112 will enter the Error state and
assert the ALERT# pin.
3.
The fault handling circuitry will then determine
subsequent actions.
Note:
If a load that draws between 2 mA and 7 mA
is connected to the port power switch, a volt-
age ripple between 40-90 mVPP is observed
at the VBUS output. This behavior is normal
and it does not affect the charging process
when a portable device is connected.
TABLE 7-1:
ILIM DECODE
COMM_ILIM
Pulldown
Resistor
(±1%)
PWR_EN1
and
PWR_EN2
Polarity
ILIM (A)
Total ILIM
(A)
(Note 1)
GND
Active-High
0.53
0.53+0.53
10 kΩ
Active-High
0.96
0.96+096
12 kΩ
Active-High
1.07
1.07+1.07
15 kΩ
Active-High
1.28
1.28+1.28
18 kΩ
Active-High
1.6
1.6+1.6
22 kΩ
Active-High
2.13
2.13+2.13
27 kΩ
Active-High
2.67
2.67+2.67
33 kΩ
Active-High
3.2
3.2+3.2
47 kΩ
Active-Low
0.53
0.53+0.53
56 kΩ
Active-Low
0.96
0.96+0.96
68 kΩ
Active-Low
1.07
1.07+1.07
82 kΩ
Active-Low
1.28
1.28+1.28
100 kΩ
Active-Low
1.6
1.6+1.6
120 kΩ
Active-Low
2.13
2.13+2.13
150 kΩ
Active-Low
2.67
2.67+2.67
VDD
Active-Low
3.2
3.2+3.2
Note 1:
The total maximum current depends on
power dissipation characteristics of the
design (see Table 1-1).



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