SP6120B datasheet(16/22 Pages) SIPEX

16 / 22 page

Date: 5/25/04

SP6120B Low Voltage, AnyFETTM, Synchronous, Buck Controller

are prone to such surge current when power

supplies are connected ‘live’ to low impedance

power sources. Certain tantalum capacitors, such

as AVX TPS series, are surge tested. For ge-

neric tantalum capacitors, use 2:1 voltage derat-

ing to protect the input capacitors from surge

fall-out.

MOSFET Selection

The losses associated with MOSFETs can be

divided into conduction and switching losses.

Conduction losses are related to the on resis-

tance of MOSFETs, and increase with the load

current. Switching losses occur on each on/off

transition when the MOSFETs experience both

high current and voltage. Since the bottom

MOSFET switches current from/to a paralleled

diode (either its own body diode or a Schottky

diode), the voltage across the MOSFET is no

more than 1V during switching transition. As a

result, its switching losses are negligible. The

switching losses are difficult to quantify due to

all the variables affecting turn on/off time. How-

ever, the following equation provides an ap-

proximation on the switching losses associated

with the top MOSFET driven by SP6120B.

OUT

rss

(max)

where

Crss = reverse transfer capacitance of the top

MOSFET

Switching losses need to be taken into account

for high switching frequency, since they are

directly proportional to switching frequency.

The conduction losses associated with top and

bottom MOSFETs are determined by:

OUT

(max)

)

(

(max) =

)

(

(max)

)

(

(max)

OUT

−

where

PCH(max) = conduction losses of the high side

MOSFET

PCL(max) = conduction losses of the low side

MOSFET

RDS(ON) = drain to source on resistance.

The total power losses of the top MOSFET are

the sum of switching and conduction losses. For

synchronous buck converters of efficiency over

90%, allow no more than 4% power losses for

high or low side MOSFETs. For input voltages

of 3.3V and 5V, conduction losses often domi-

nate switching losses. Therefore, lowering the

RDS(ON) of the MOSFETs always improves

efficiency even though it gives rise to higher

switching losses due to increased Crss.

Top and bottom MOSFETs experience unequal

conduction losses if their on time is unequal. For

applications running at large or small duty cycle,

it makes sense to use different top and bottom

MOSFETs. Alternatively, parallel multiple

MOSFETs to conduct large duty factor.

RDS(ON) varies greatly with the gate driver volt-

age. The MOSFET vendors often specify RDS(ON)

on multiple gate to source voltages (VGS), as

well as provide typical curve of RDS(ON) versus

VGS. For 5V input, use the RDS(ON) specified at

4.5V VGS. At the time of this publication, ven-

dors, such as Fairchild, Siliconix and Interna-

tional Rectifier, have started to specify RDS(ON)

at VGS less than 3V. This has provided necessary

data for designs in which these MOSFETs are

driven with 3.3V and made it possible to use

SP6120B in 3.3V only applications.

Thermal calculation must be conducted to en-

sure the MOSFET can handle the maximum

load current. The junction temperature of the

MOSFET, determined as follows, must stay

below the maximum rating.

MOSFET

(max)

( max)

where

TA(max) = maximum ambient temperature

PMOSFET(max) = maximum power dissipa-

tion of the MOSFET

RΘJA = junction to ambient thermal resistance.

RΘJA of the device depends greatly on the board

layout, as well as device package. Significant

thermal improvement can be achieved in the

maximum power dissipation through the proper

design of copper mounting pads on the circuit

board. For example, in a SO-8 package, placing

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