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Date: 05/25/04

SP6654 High Efficiency 800mA Synchronous Buck Regulator

© Copyright 2004 Sipex Corporation

SP6654EB

PWRGD

APPLICATION INFORMATION: Continued

Figure 19. SP6654 PCB Component Sample Layout

Figure 20. SP6654 PCB Top Sample Layout

Figure 21. SP6654 PCB Bottom Sample Layout

the other active components on the board, some

rules should be followed. Refer to the typical

application schematic on page 1 and the sample

PCB layout shown in the following figures to

illustrate how to layout a SP6654 power supply.

Avoid injecting noise into the sensitive part of

circuit via the ground plane. Input and output

capacitors conduct high frequency current through

the ground plane. Separate the control and power

grounds and connect them together at a single

point. Power ground plane is shown in the figure

titled PCB top sample layout and connects the

control ground plane connects from pin 9 GND to

return of the feedback resistor. These two separate

control and power ground planes come together in

the figure titled PCB top sample layout where

SP6654 pin 9 GND is connected to pin 10 PGND.

Power loops on the input and output of the con-

verter should be laid out with the shortest and

widest traces possible. The longer and narrower

the trace, the higher the resistance and inductance

it will have. The length of traces in series with the

capacitors increases its ESR and ESL and reduces

their effectiveness at high frequencies. Therefore,

put the 1

GND pins of the converter as possible, the 22

µF

capacitor as close to the inductor as possible. The

close to the FB pin. Any noise traces like the LX

pin should be kept away from the voltage feedback

network and separated from it by using power

ground copper to minimize EMI.