4

Rev:A Date: 11/20/03

SP6681 High Efficiency Boost Charge Pump Regulator

© Copyright 2002 Sipex Corporation

PIN ASSIGNMENTS

Pin 1— V

Pin 2 — CF1P — Positive terminal to the charge

pump flying capacitor, CF1.

Pin 3 — V

supply voltage.

Pin 4 — C/4 — This is a control line for the

internal charge pump frequency. When this

control line is forced to a logic high, the

the CLK frequency, provided that Cx8 is

low.

Pin 5 — Cx8 — This is a control line for the

internal charge pump frequency. When this

control line is forced to a logic high, the

internal charge pump frequency is set to x8 of

the CLK frequency.

Pin 6 — CLK — 32.768kHz Clock. Connect

this input pin to an external 32.768kHz clock

PINOUT

to drive the frequency of the charge pump.

Logic low inputs on the C/4 and Cx8 pins sets

the internal charge pump frequency accord-

ing to Table 1.

Shutdown mode for the

device is set when there is no clock signal

present on this input pin, or when it is pulled

to ground.

Pin 7 — CF2N — Negative terminal to the

charge pump flying capacitor, CF2.

Pin 8 — GND — Ground reference.

Pin 9 — CF2P — Positive terminal to the charge

pump flying capacitor, CF2.

Pin 10 — CF1N — Negative terminal to the

charge pump flying capacitor, CF2.

C/4

CLK

GND

SP6681

8

7

4

3

2

1

5

6

9

10

Cx8

CF1P

CF2P

CF1N

CF2N