AS5171 datasheet(13/42 Pages) AMSCO

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ams Datasheet

Page 13

[v1-01] 2016-Feb-17

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AS5171 − Register Description

The register description for AS5171A/B are explained below:

• Descriptions and Settings with Analog are supported by

AS5171A

• Descriptions and Settings with PWM are supported by

AS5171B

Figure 14:

Non-Volatile Memory Register Description

Address

Bit Position

Field

Description

0x0A

7:0

CUSTID0

Customer ID byte 0

0x0B

7:0

CUSTID1

Customer ID byte 1

0x0C

7:0

CUSTID2

Customer ID byte 2

0x0D

7:0

CUSTID3

Customer ID byte 3

0x0E

PWMINV

PWM inverted

PWMSR

PWM slew rate

(0 = PWM slew rate fast PWMSRF,

1 = PWM slew rate slow PWMSRS)

3:2

DIGOS

Digital output stage

(00 = PWM push-pull

01 = PWM pull-down

10 = PWM pull-up)

It applies to the AS5171B only

6:4

RBKDEB

Analog read-back debouncing

7n.a.

Not used

0x0F

FBS

Failure band selection (0 = lower failure band,

1 = upper failure band)

2:1

HYST

Hysteresis across the brake point

4:3

QUAD

Quadrant selection

7:5

PWMFR

PWM frequency selection

0x10

1:0

PWMRTH

PWM rising threshold tbd

3:2

PWMFTH

PWM falling threshold tbd

7:4

n.a.

Not used

0x11

4:0

n.a.

Not used

5n.a.

Not used

6n.a.

Not used

7n.a.

Not used

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