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MB9B520M 데이터시트(PDF) 85 Page - SPANSION |
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MB9B520M 데이터시트(HTML) 85 Page - SPANSION |
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85 / 113 page ![]() D a t a S h e e t 82 MB9B520M_DS706-00048-3v0-E, March 18, 2015 CONFIDENTIAL 5. 12-bit A/D Converter ・Electrical characteristics for the A/D converter (VCC = AVCC = 2.7V to 5.5V, VSS = AVSS = AVRL = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name Value Unit Remarks Min Typ Max Resolution - - - - 12 bit Integral Nonlinearity - - - ± 1.5 ± 4.5 LSB AVRH = 2.7 V to 5.5 V Differential Nonlinearity - - - ± 1.7 ± 2.5 LSB Zero transition voltage VZT ANxx - ± 10 ± 15 mV Full-scale transition voltage VFST ANxx - AVRH ± 5 AVRH ± 15 mV Conversion time - - 0.8* 1 - - μs AVCC ≥ 4.5 V 1.0* 1 - - AVCC < 4.5 V Sampling time* 2 tS - 0.24 - 10 μs AVCC ≥ 4.5 V 0.3 - AVCC < 4.5 V Compare clock cycle* 3 tCCK - 40 - 1000 ns AVCC ≥ 4.5 V 50 - AVCC < 4.5 V State transition time to operation permission tSTT - - - 1.0 μs Analog input capacity CAIN - - - 9.7 pF Analog input resistor RAIN - - - 1.7 kΩ AVCC ≥ 4.5 V 2.4 AVCC < 4.5 V Interchannel disparity - - - - 4 LSB Analog port input current - ANxx - - 5 μA Analog input voltage - ANxx AVRL - AVRH V Reference voltage - AVRH 2.7 - AVCC V - AVRL AVSS - AVSS V *1: The conversion time is the value of sampling time (tS) + compare time (tC). The condition of the minimum conversion time is the following. AVCC ≥ 4.5 V, HCLK=50 MHz sampling time: 240 ns, compare time: 560 ns AVCC < 4.5 V, HCLK=40 MHz sampling time: 300 ns, compare time: 700 ns Ensure that it satisfies the value of the sampling time (tS) and compare clock cycle (tCCK). For setting of the sampling time and compare clock cycle, see "Chapter 1-1: A/D Converter" in "FM3 Family PERIPHERAL MANUAL Analog Macro Part". The register settings of the A/D Converter are reflected in the operation according to the APB bus clock timing. For the number of the APB bus to which the A/D Converter is connected, see "Block Diagram". The base clock (HCLK) is used to generate the sampling time and the compare clock cycle. *2: A necessary sampling time changes by external impedance. Ensure that it sets the sampling time to satisfy (Equation 1). *3: The compare time (tC) is the value of (Equation 2). |
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