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PC87413 데이터시트(PDF) 233 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 PC87413
상세설명  LPC ServerI/O for Servers and Workstations
PDF  257 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87413 데이터시트(HTML) 233 Page - National Semiconductor (TI)

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11.0 Device Characteristics (Continued)
Revision 1.2
233
www.national.com
11.2 DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES
The following tables summarize the DC characteristics of all device pins described in Section 1.2 on page 20. The charac-
teristics describe the general I/O buffer types defined in Table 1 on page 20. For exceptions, refer to Section 11.2.9 on
page 235. The DC characteristics of the LPC Interface meet the PCI Local Bus Specification (Rev 2.2 December 18, 1998)
for 3.3V DC signaling. The DC characteristics of the ACCESS.bus Interface meet the SMBus (Rev 1.1 Dec. 11, 1998) and
ACCESS.bus (Rev. 3.0 Sep. 1995) specifications for on-board devices.
11.2.1
Input, CMOS Compatible with Schmitt Trigger
Symbol: INCS
11.2.2
Input, PCI 3.3V
Symbol: INPCI
11.2.3
Input, SMBus Compatible
Symbol: INSM
Symbol
Parameter
Conditions
Min
Max
Unit
VIH
Input High Voltage
0.75 VSUP
1
1. VSUP is VDD, VSB or VPP according to the input power well.
5.52
2. Not tested. Guaranteed by design.
V
VIL
Input Low Voltage
−0.51
1.1
V
VHY
Input Hysteresis
2003
3. Not tested. Guaranteed by characterization.
mV
IIL
Input Leakage Current
0<VIN <VSUP
±14
4. Maximum 10
µA for all pins together. Not tested. Guaranteed by characterization.
µA
Symbol
Parameter
Conditions
Min
Max
Unit
VIH
Input High Voltage
0.5 VDD
VDD + 0.5
1
1. Not tested. Guaranteed by design.
V
VIL
Input Low Voltage
−0.51
0.3 VDD
V
lIL
2
2. Input leakage current includes the output leakage of the bidirectional buffers with TRI-STATE outputs.
Input Leakage Current
0<VIN <VDD
±13
3. Maximum 10
µA for all pins together. Not tested. Guaranteed by characterization.
µA
Symbol
Parameter
Conditions
Min
Max
Unit
VIH
Input High Voltage
1.4
5.51
1. Not tested. Guaranteed by design.
V
VIL
Input Low Voltage
−0.51
0.8
V
IIL
2
2. Input leakage current includes the output leakage of the bidirectional buffers with TRI-STATE outputs.
Input Leakage Current
0<VIN <VSB
±13
3. Maximum 10
µA for all pins together. Not tested. Guaranteed by characterization.
µA



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