PC87413 datasheet(109/257 Pages) NSC

109 / 257 page

5.0 X-Bus Extension (Continued)

Revision 1.2

109

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Bit

76543210

Name

XRDYEN

WAITSEN

INDIRMEN

ZSELMAP

Reset

Strap

Bit

Description

XRDYEN (XRDY Enable). Enables the use of XRDY input for the zones mapped to XCSn. The reset value of

this bit depends on the setting of XCNF2 and XCNF0 straps, sampled at VSB Power-Up reset.

0: Disabled (default for XZCNF1-3; default for XZCNF0 if XCNF0 = 0 or XCNF2 = 0)

1: Enabled (default for XZCNF0 if XCNF0 = 1 and XCNF2 = 1)

WAITSEN (Wait States Enable). This bit controls the number of wait states added to an X-Bus transaction. If the

TRANSPD bit in the XZM0 to XZM3 registers is set, the setting of WAITSEN is ignored (wait states are disabled).

Wait states disabled

Eight wait states (CLK cycles) enabled (default)

INDIRMEN (Indirect Memory Access Enable). Enables indirect memory access mechanism to generate

memory transactions through XCSn.

0: Disabled (default)

1: Enabled

4-0

ZSELMAP (Zone Select Mapping).

UDIZ = User-Deﬁned I/O Zone.

MEM = User-Deﬁned Memory Zone.

-= XCSn does not respond to this zone decode.

+= XCSn responds to this zone decode and is inﬂuenced by its setting.

Bits

Function

4 3 2 1 0 UDIZ0 UDIZ1 UDIZ2 UDIZ3 TST BIOS0 BIOS1 MEM0 MEM1

0 0 0 0 0:

- (default for XZCNF1-3;

default for XZCNF0 if XCNF2 = 0)

0 0 0 0 1:

- (default for XZCNF0 if XCNF2 = 1)

0 0 0 1 0:

0 0 0 1 1:

0 0 1 0 0:

0 0 1 0 1:

0 0 1 1 0:

0 0 1 1 1:

0 1 0 0 0:

0 1 0 0 1:

0 1 0 1 0:

0 1 0 1 1:

0 1 1 0 0:

0 1 1 0 1:

0 1 1 1 0:

0 1 1 1 1:

1 0 0 0 0:

1 0 0 0 1:

1 0 0 1 0:

1 0 0 1 1:

1 0 1 0 0:

1 0 1 0 1:

1 0 1 1 0:

1 0 1 1 1:

1 1 0 0 0:

Others:

Reserved

PC87413 데이터시트(PDF) 109 Page - National Semiconductor (TI)

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