PC87413 datasheet(129/257 Pages) NSC

129 / 257 page

6.0 ACCESS.bus Interface (Continued)

Revision 1.2

129

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Bit

Type

Description

R/W1S VSBLOCK (Conﬁguration Lock Until VSB Reset). Controls the reset source of the following lock bits:

LOCKMCF and LOCKGCF in the SIOCF1 register, LOCKFDS in the SIOCF6 register, LOCKCCF in the

CLOCKCF register, LOCKCFP in all GPCFG1 registers (for each GPIO pin), LOCKIOMP in the XIOCNF

LOCKXSCF in the XZM0-XZM3 registers (PC87417), LOCKXHP in the HAP0 and HAP1 registers

(PC87417), LOCK_TMRRST in the PWTMRCTL register and LOCK_SLP_ENC in the SLP_ST_CFG

0: Lock bits cleared by VDD Power-Up reset, by Hardware reset or by VSB Power-Up reset (default)

1: Lock bits cleared only by VSB Power-Up reset

R/W

UNLOCKM (Unlock Multiplexing Conﬁguration). When set to ‘1’, this bit resets the LOCKMCF bit in

the SIOCF1 register, ignoring the setting of the VSBLOCK bit. It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCKMCF bit

R/W

UNLOCKG (Unlock GPIO Conﬁguration). When set to ‘1’, this bit resets the LOCKGCF bit in the

SIOCF1 register and the LOCKCFP bit in all the GPCFG1 registers (for each GPIO pin), ignoring the

setting of the VSBLOCK bit. It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCKGCF and all the LOCKCFP bits

R/W

UNLOCKF (Unlock Fast Disable Conﬁguration). When set to ‘1’, this bit resets the LOCKFDS bit in

the SIOCF6 register, ignoring the setting of the VSBLOCK bit. It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCKFDS bit

R/W

UNLOCKC (Unlock Clock Conﬁguration). When set to ‘1’, this bit resets the LOCKCCF bit in the

CLOCKCF register, ignoring the setting of the VSBLOCK bit. It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCKCCF bit

R/W

UNLOCKX (Unlock X-Bus Conﬁguration). When set to ‘1’, this bit resets the LOCKIOMP bit in the

XIOCNF register, the LOCKMMP bit in the XMEMCNF2 register, the LOCKXSCF bit in the XZM0-XZM3

registers and the LOCKXHP bit in the HAP0 and HAP1 registers, ignoring the setting of the VSBLOCK

bit (PC87417). It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCKIOMP, LOCKMMP, LOCKXSCF and LOCKXHP bits

R/W

UNLOCKR (Unlock RAM Lock Conﬁguration). When set to ‘1’, this bit resets all the bits of the RLR

when read.

0: Normal operation (default)

1: Reset all the bits of the RLR register

R/W

UNLOCKS (Unlock SWC Conﬁguration). When set to ‘1’, this bit resets the LOCK_TMRRST bit in the

PWTMRCTL register and the LOCK_SLP_ENC bit in the SLP_ST_CFG register, ignoring the setting of

the VSBLOCK bit. It always returns ‘0’ when read.

0: Normal operation (default)

1: Reset the LOCK_TMRRST and LOCK_SLP_ENC bits

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