| 전자부품 데이터시트 검색엔진 |
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PC87413 데이터시트(PDF) 175 Page - National Semiconductor (TI) |
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PC87413 데이터시트(HTML) 175 Page - National Semiconductor (TI) |
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175 / 257 page ![]() 9.0 System Wake-Up Control (SWC) (Continued) Revision 1.2 175 www.national.com The VSB Power-up and VDD Power-up resets both de-assert the WDO signal before the 250 ms have passed. The WDO_EVT_STS status bit is cleared by the VSB Power-up reset. Usage Hints Before changing the Watchdog Time-Out Data value in the WDTO register, set all the enable bits of the watch- dog trigger events to ‘0’ - disable (in the WDCFG register; see Section 9.3.35 on page 203). Re-enable the watchdog trigger events (set to ‘1’) after writing the new Watchdog Time-Out Data. 9.2.10 Miscellaneous Functions Power Management Control The SWC contains two Power Management registers, which allows the software to disable each Legacy module and to TRI-STATE its outputs in a centralized manner. The SWC Fast Disable register (SWCFDIS) provides a fast way for the Power Management software to disable one or more Legacy modules without having to access the Activate register of each module (at index 30h) through the Index/Data registers. The FDC, Parallel Port, Serial Port 1, Serial Port 2, Mouse Control and Keyboard Control logical devices can be disabled through the SWCFDIS register (see Section 9.3.8 on page 185). The SWC TRI-STATE register (SWCTRIS) also provides a fast way for the Power Management software to float the out- puts of one or more Legacy modules without having to access their TRI-STATE Control bit in the Special Configuration reg- ister at index F0h. The module outputs enter TRI-STATE only when the module is disabled. The FDC, Parallel Port, Serial Port 1, Serial Port 2, Mouse and Keyboard Control module outputs can be TRI-STATED through the SWCTRIS register (see Section 9.3.9 on page 186). Keyboard/Mouse Power Control (VDDFELL) If the VDDFLMUX bit in the SIOCF2 register (see Section 3.7.3 on page 50) is set to ‘1’, the SWC generates a 1 second, active high pulse at the VDDFELL pin each time the VDD power supply is turned off (by setting the ONCTL signal to high level). This signal can be used by the system to turn off VSB power to the Keyboard and Mouse devices, thus causing them to reset their internal circuits. |
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