DS2740

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Table 2. DETAILED PIN DESCRIPTION

PIN

SYMBOL

DESCRIPTION

OVD

1

1-Wire Bus Speed Control. Input logic level selects the speed of the 1-

Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard

timing (STD). On a multidrop bus, all devices must operate at same

speed.

PIO

2

Programmable I/O Pin. Programmed as input or output through internal

registers. Open-drain output sufficient for LED or vibrator activation.

SNS

3

Current-Sense Resistor Input

IS2

4

Current-Sense Input. Connected to SNS through a 10kΩ resistor to

allow filtering of the current waveform by an external capacitor.

IS1

5

filtering of the current waveform through an external capacitor.

6

Device Ground, Current-Sense Resistor Return. Connect directly to

the negative terminal of the battery cell.

DQ

7

Data I/O Pin. Operates bidirectionally with open-drain output driver.

Internal 1µA pulldown aids in sensing pack removal and sleep-mode

activation.

8

Power-Supply Input. Connects to system voltage supply or positive

terminal of battery cell.

Figure 2. APPLICATION EXAMPLE

DS2740

VDD

VSS

DQ

PIO

DATA

2.7V to 5.5V

System Supply

Battery Pack

Negative

Battery

Pack

Return

SNS

PIO

IS1

IS2

104

150

150

104

System

GND

OVD

*

*

* 5.6V zener recommended for ESD protection when DATA or PIO

contacts exposed, such as a removable battery pack application

150