ADC12DL080CIVSSLASHNOPB datasheet(4/34 Pages) TI1

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AGND

ADC12DL080

SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013

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Pin Descriptions and Equivalent Circuits

Pin No.

Symbol

Equivalent Circuit

Description

ANALOG I/O

VINA+

VINB+

Differential analog input pins. With a 1.0V reference voltage the

differential full-scale input signal level is 2.0 VP-P with each input pin

voltage centered on a common mode voltage, VCM. The negative

VINA−

input pins may be connected to VCM for single-ended operation, but

VINB−

a differential input signal is required for best performance.

This pin is used in conjunction with REFSEL/DCS (pin 11) to select

the internal 1.0V reference, or as the external reference input.

If VREF is tied HIGH, the internal 1.0V reference is selected.

REFSEL/DCS must be LOW or tied to VRMA or VRMB.

If a voltage in the range of 0.8V to 1.2V is applied to this pin, that

VREF

voltage is used as the reference. VREF should be bypassed to AGND

with a 0.1 µF low ESL capacitor when an external reference is used.

The nominal external reference voltage is 1.0V but values in the

range of 0.8V to 1.2V may be used. REFSEL/DCS must be HIGH or

REFSEL/DCStied to VRMA or VRMB.

See Table 3 in for more information.

This pin is used in conjunction with VREF (pin 7) to select the

reference source and turn the Duty Cycle Stabilizer (DCS) on or off.

When REFSEL/DCS is LOW and VREF is HIGH, the internal 1.0V

reference is selected and DCS is On.

REFSEL/DCS

When REFSEL/DCS is HIGH, an external reference voltage in the

range of 0.8V to 1.2V should be applied to the VREF input. DCS is

On.

With this pin connected to VRMA or VRMB, DCS is Off.

See Table 3 in REFSEL/DCS for more information.

VRPA

VRPB

VRMA

VRMB

These are reference bypass pins. These pins should each be

bypassed to ground with a 0.1 µF capacitor. A 10 µF capacitor

should be placed between the VRPA and VRNA pins and between the

VRPB and VRNB pins.

VRNA

These pins should not be loaded.

VRNB

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