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DAC7760IPWPR 데이터시트(PDF) 18 Page - Texas Instruments

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부품명 DAC7760IPWPR
상세설명  Single-Channel, 12- and 16-Bit Programmable Current Output and Voltage Output Digital-to-Analog Converters for 4-mA to 20-mA Current Loop Applications
PDF  63 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

DAC7760IPWPR 데이터시트(HTML) 18 Page - Texas Instruments

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background image
20
30
40
50
60
70
0
20
40
60
80
100
Load Capacitor (nF)
C002
AVDD = +18 V
AVSS = -18 V
CMP = 100 pF
0
50
100
150
200
250
0
200
400
600
800
1000
Load Capacitor (nF)
C003
AVDD = +18 V
AVSS = -18 V
CMP = 470 pF
Time (20 µs/div)
VOUT
LATCH
C001
AVDD = +24 V
AVSS = -12 V
From code: FFFFh
To code:
0000h
“10 V range
C
LOAD = 200 pF
0
10
20
30
40
50
60
0
5
10
15
20
25
Load Capacitor (nF)
C001
AVDD = +18 V
AVSS = -18 V
CMP = 0 pF
-0.010
-0.008
-0.006
-0.004
-0.002
0.000
0.002
0.004
0.006
0.008
0.010
-25
-20
-15
-10
-5
0
5
10
15
20
25
Source / Sink Current (mA)
C009
AVDD = +12 V
AVSS = -12 V
±10 V range
Time (20 µs/div)
VOUT
LATCH
C001
AVDD = +24 V
AVSS = -12 V
From code: 0000h
To code:
FFFFh
“10 V range
C
LOAD = 200 pF
18
DAC7760, DAC8760
SBAS528B – JUNE 2013 – REVISED JUNE 2016
www.ti.com
Product Folder Links: DAC7760 DAC8760
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Typical Characteristics (continued)
At TA = 25°C, unless otherwise noted.
Figure 34. VOUT (Zero-Scale) vs Load Current
(Source or Sink)
Figure 35. BP10V Rising
Figure 36. BP10V Falling
Figure 37. VOUT Settling Time vs Load
(No Compensation Capacitor)
Figure 38. VOUT Settling Time vs LOAD
(100 pF Between VOUT and CMP Pins)
Figure 39. VOUT Settling Time vs LOAD
(470 pF Between VOUT and CMP Pins)



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