REV. 0

AD1981A

–19–

JS0INT

Indicates Pin JS0 has generated an interrupt. Remains set until the software services JS0 interrupt, i.e., JS0 ISR,

should clear this bit by writing a “0” to it.

Note that the interrupt to the system is actually an OR combination of this bit and JS1INT. Also note that the

actual interrupt implementation is selected by the INTS Bit (Reg 74h). It is also possible to generate a software

system interrupt by writing a “1” to this bit.

JS1INT

Indicates Pin JS1 has generated an interrupt. Remains set until the software services JS1 interrupt, i.e., JS1 ISR

should clear this bit by writing a “0” to it.

See JS0INT description above for additional details.

JS0ST

JS0 STATE: This bit always reports the logic state of JS0 Pin.

JS1ST

JS1 STATE: This bit always reports the logic state of JS1 Pin.

JS0MD

JS0 MODE: This bit selects the operation mode for the JS0 Pin.

0 = Jack Sense Mode (Default)

1 = Interrupt Mode

JS1MD

JS1 MODE: This bit selects the operation mode for the JS1 Pin.

0 = Jack Sense Mode (Default)

1 = Interrupt Mode

JS0TMR

JS0 Timer Enable: If this bit is set to a “1,” JS0 must be high for greater than 250 ms to be recognized.

JS1TMR

JS1 Timer Enable: If this bit is set to a “1,” JS1 must be high for greater than 250 ms to be recognized.

JS0EQB

JS0 EQ Bypass Enable: This bit enables JS0 to control the EQ bypass.

When this bit is set to “1,” JS0 = 1 will cause the EQ to be bypassed.

JS1EQB

JS1 EQ Bypass Enable: This bit enables JS1 to control the EQ bypass.

When this bit is set to “1,” JS1 = 1 will cause the EQ to be bypassed.

JSMT[2,0]

JS Mute Enable Selector:

These 3 bits select and enable the Jack Sense muting action (see Table I).