| 전자부품 데이터시트 검색엔진 |
|
ADE3700SX 데이터시트(PDF) 45 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ADE3700SX 데이터시트(HTML) 45 Page - STMicroelectronics |
|
45 / 89 page ![]() 45/89 ADE3700 Output Sequencer 2.11 Output Sequencer The Output Sequencer module synchronizes timing for the output video interface. It allows sufficient flexibility to support a broad range of Smart Panel applications as well using the Output Timing Controller (TCON) module, refer to Section 2.12 for more details. The timing unit is based on horizontal and vertical counters, which are locked with the input video stream. 2.11.1 Frame Synchronization Due to the limited pixel memory of the chip, the output active video needs to be perfectly synchronized with the input active video. This mode of operation is called Frame Lock. 2.11.2 Timing Unit The Timing Unit consists of a 12-bit horizontal and 12-bit vertical counter. It is synchronized with the input video stream. 2.11.3 Signal Generation The Signal Generation unit can generate all fixed control signals like hsync, vsync and data enable as well as those required to run the internal data path. The fixed control signals appear on the Figure 5: Output Sequencer and Timing Controller Block Diagram Figure 6: Frame Lock Operation I2C Interface timing unit delay vert_start horizontal vertical signal generation fixed (OSQ) programmable (TCON) hs, vs, den tcon [o:13] |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |