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WM8993 데이터시트(PDF) 93 Page - Wolfson Microelectronics plc

부품명 WM8993
상세설명  Audio Hub CODEC for Multimedia Phones
PDF  229 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8993 데이터시트(HTML) 93 Page - Wolfson Microelectronics plc

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Production Data
WM8993
w
PD, November 2010, Rev 4.0
93
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
2:0
SPKOUTR_BOOST
[2:0]
000b
(1.0x)
Right Speaker Gain Boost
000 = 1.00x boost (+0dB)
001 = 1.19x boost (+1.5dB)
010 = 1.41x boost (+3.0dB)
011 = 1.68x boost (+4.5dB)
100 = 2.00x boost (+6.0dB)
101 = 2.37x boost (+7.5dB)
110 = 2.81x boost (+9.0dB)
111 = 3.98x boost (+12.0dB)
R54 (36h)
Speaker
Mixer
8
SPKAB_REF_SEL
0b
Selects Reference for Speaker in
Class AB mode
0 = SPKVDD/2
1 = VMID
Table 60 Speaker Mode and Boost Control
Clocking of the Class D output driver is derived from CLK_SYS. The clocking frequency division is
configured automatically, according to the CLK_SYS_RATE and SAMPLE_RATE registers. (See
“Clocking and Sample Rates” for further details of the system clocks and control registers.)
The Class D switching clock is enabled whenever SPKOUTL_ENA or SPKOUTR_ENA is set,
provided also that SPKOUT_CLASSAB_MODE = 0. The frequency is as described in Table 61.
Note that the CLK_SYS must be present and enabled when using the speaker outputs in Class D
mode.
SAMPLE
RATE (kHz)
SYSTEM CLOCK RATE (CLK_SYS / fs ratio)
64
128
192
256
384
512
768
1024
1408
1536
8
256
256
256
341.3
256
341.3
256
341.3
352
256
11.025
352.8
352.8
352.8
352.8
352.8
352.8
352.8
352.8
12
384
384
384
384
384
384
384
384
16
256
341.3
384
341.3
384
341.3
384
22.05
352.8
352.8
352.8
352.8
352.8
352.8
24
341.3
384
384
384
384
384
32
341.3
341.3
384
341.3
384
44.1
352.8
352.8
352.8
352.8
48
384
384
384
384
Table 61 Class D Switching Frequency (kHz)



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