전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

DP83953 데이터시트(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 DP83953
상세설명  Repeater Interface Controller with Security Features, Internal Drivers and Integrated Filters
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83953 데이터시트(HTML) 7 Page - National Semiconductor (TI)

Back Button DP83953 Datasheet HTML 3Page - National Semiconductor (TI) DP83953 Datasheet HTML 4Page - National Semiconductor (TI) DP83953 Datasheet HTML 5Page - National Semiconductor (TI) DP83953 Datasheet HTML 6Page - National Semiconductor (TI) DP83953 Datasheet HTML 7Page - National Semiconductor (TI) DP83953 Datasheet HTML 8Page - National Semiconductor (TI) DP83953 Datasheet HTML 9Page - National Semiconductor (TI) DP83953 Datasheet HTML 10Page - National Semiconductor (TI) DP83953 Datasheet HTML 11Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 90 page
background image
2.0 Pin Descriptions (Continued)
7
www.national.com
TT = TTL compatible, B = Bi-directional, C = CMOS compatible, OD = Open Drain, I = Input, O = Output,
Z = high impedance
RTI
67
C
O
REAL TIME INTERRUPT: A low level on the RTI output indi-
cates the RIC2A's real time (packet specific) interrupt logic re-
quires CPU attention. The interrupt is cleared by reading the
Real Time Interrupt Status register. All interrupt sources may be
masked.
CDEC
91
TT
I
COUNTER DECREMENT: A rising edge on the CDEC input
strobe decrements all of the RIC2A's Port Event Counters by
one. This input is internally synchronized and if necessary the
operation of the signal is delayed if there is a simultaneous in-
ternally generated counting operation.
WR
90
TT
I
WRITE STROBE: Strobe from the CPU used to write an internal
register defined by the RA0 - RA4 inputs.
RD
89
TT
I
READ STROBE: Strobe from the CPU used to read an internal
register defined by the RA0 - RA4 inputs.
MLOAD
92
TT
I
DEVICE RESET AND MODE LOAD: When this input cycles
back up from low to high, all of the RIC2A's state machines,
counters and network ports are reset and held inactive. On the
rising edge of MLOAD the logic levels present on the D0 - 7 pins
and RA0 - RA4 inputs are latched into the RIC2A's configuration
registers. The rising edge of MLOAD also signals the beginning
of the display test operation. The clock signal must be present
on the CLKIN pin during MLOAD assertion and de-assertion.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com