LM97600CIUTSLASHNOPB datasheet(13/58 Pages) TI1

13 / 58 page

LM97600

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SNAS600A – JULY 2012 – REVISED MARCH 2013

Converter Electrical Characteristics (continued)

The following specifications apply after calibration for VA = VTH = VC = +1.2VDC, VO = V25 = +2.5VDC, VIN FSR (a.c. coupled) =

Default ECM setting, CL = 10 pF, Differential a.c. coupled Sinewave Input Clock, fCLK = 2.5 GHz at 0.5VP-P with 50% duty

cycle, REXT = 3600Ω ±0.1%, RTRIM = 3600Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differential, after calibration.

Boldface limits apply for TA = TMIN to TMAX. All other limits TA = 25°C, unless otherwise noted.

(1)(2)

Typical

Limits

Units

Symbol

Parameter

Conditions

(3)

(Limits)

POWER SUPPLY CHARACTERISTICS

Analog Supply Current

PD = Low

835

ITH

Track and Hold Supply Current

PD = Low

675

Clock Supply Current

PD = Low

150

I25

2.5V Supply current

PD = Low

290

Output Driver Supply Current

PD = Low

105

PD = Low

3.0

3.25

W (max)

Power Consumption

PD = High

Change in offset with change in

PSRR1

D.C. Power Supply Rejection Ratio

supplies from Min to Max Operating

values

248 MHz, 100mVP-P riding on

PSRR2

A.C. Power Supply Rejection Ratio

supplies

AC ELECTRICAL CHARACTERISTICS - Sampling Clock

GHz

fCLK1

Maximum Input Clock Frequency

Sampling rate is 2x clock input

2.5

(min)

GHz

fCLK2

Minimum Input Clock Frequency

Sampling rate is 2x clock input

1.0

(max)

fCLK2 ≤ Input clock frequency ≤

% (min)

tCYC

Input Clock Duty Cycle

fCLK1

(12)

% (max)

tLC

Input Clock Low Time

fCLK = fCLK1

(13)

120

ps (min)

tHC

Input Clock High Time

fCLK = fCLK1

(13)

120

ps (min)

tAJ

Aperture Jitter

0.55

ps rms

(12) This parameter is ensured by design and/or characterization and is not tested in production.

(13) This parameter is ensured by design and is not tested in production.

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