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TAS3108IADCPRG4 데이터시트(PDF) 48 Page - Texas Instruments |
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TAS3108IADCPRG4 데이터시트(HTML) 48 Page - Texas Instruments |
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48 / 63 page ![]() www.ti.com 8.5.3 Serial Audio Port Master Mode Signals (TAS3108/TAS3108IA) tr(SCLKOUT) tf(SCLKOUT) tf(SCLKOUT) tsk tr(SCLKOUT) tpd1(SCLKOUT2) tpd1(SCLKOUT1) tf(LRCLK), tr(LRCLK) tpd2 tsu th SCLKOUT2 LRCLK (Output) SDOUT1 SDOUT2 SDOUT3 SDOUT4 SDIN1 SDIN2 SDIN3 SDIN4 SCLKOUT1 T0091-01 TAS3108, TAS3108IA AUDIO DIGITAL SIGNAL PROCESSORS SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007 over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT f(LRCLK) Frequency LRCLK CL = 30 pF 32(1) 192(1) kHz tr(LRCLK) Rise time, LRCLK (2) CL = 30 pF 12(1) ns tf(LRCLK) Fall time, LRCLK (2) Duty cycle is 50/50. 12(1) ns f(SCLKOUT) Frequency, SCLKOUT1/SCLKOUT2 CL = 30 pF 64 25(1) MHz fS (1) tr(SCLKOUT) Rise time, SCLKOUT1/SCLKOUT2 CL = 30 pF 20(1) ns tf(SCLKOUT) Fall time, SCLKOUT1/SCLKOUT2 CL = 30 pF 20(1) ns tpd1(SCLKOUT1) Propagation delay, SCLKOUT1 falling edge to LRCLK edge 4(1) ns tpd1(SCLKOUT2) Propagation delay, SCLKOUT2 falling edge to LRCLK edge 4(1) ns tpd2 Propagation delay, SCLKOUT2 falling edge to SDOUT 4(1) ns tsu Setup time, SDIN to SCLKOUT1 rising edge 20(1) ns th Hold time, SDIN from SCLKOUT1 rising edge 23(1) ns t(SKEW) Skew time, SCLKOUT1 to SCLKOUT2 3(1) ns (1) This measurement in specified by design. (2) Rise time and fall time measured from 20% to 80% of maximum height of waveform. Figure 8-3. TAS3108/TAS3108IA Serial Audio Port Master Mode Timing Waveforms 48 Electrical Specifications Submit Documentation Feedback Not Recommended for New Designs |
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