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LP3470 데이터시트(PDF) 12 Page - Texas Instruments |
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LP3470 데이터시트(HTML) 12 Page - Texas Instruments |
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12 / 22 page ![]() 12 LP3470 SNVS003G – JUNE 1999 – REVISED APRIL 2016 www.ti.com Product Folder Links: LP3470 Submit Documentation Feedback Copyright © 1999–2016, Texas Instruments Incorporated 9 Power Supply Recommendations The input of the LP3470 is designed to handle up to the supply voltage absolute maximum rating of 6 V. If the input supply is susceptible to any large transients above the maximum rating, then take extra precautions. An input capacitor is optional but not required to help avoid false reset output triggers due to noise. 10 Layout 10.1 Layout Guidelines • Place components as close as possible to the IC • Keep traces short between the IC and the C1 capacitor to ensure the timing delay is as accurate as possible. 10.2 Layout Example Figure 13 shows a layout example. Figure 13. LP3470 Layout Example |
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