LP3971 datasheet(44/52 Pages) TI1

44 / 52 page

0.5

1.0

1.5

LOAD CURRENT (A)

3.0

3.5

4.0

4.5

5.0

5.5

VPP-RMS =

VPP-C

2 + V

PP-ESR

LP3971

SNVS432V – JANUARY 2006 – REVISED MAY 2013

www.ti.com

VPP-ESR = (2 * IRIPPLE) * RESR

(5)

Because these two components are out of phase the rms value can be used to get an approximate value of

peak-to-peak ripple.

Voltage peak-to-peak ripple, root mean squared can be expressed as follows

(6)

Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series

resistance of the output capacitor (RESR).

The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations

is at the switching frequency of the part.

Table 3. Suggested Capacitor and Their Suppliers

Case Size

Model

Type

Vendor

Voltage

Inch (mm)

GRM21BR60J106K

Ceramic, X5R

Murata

6.3V

0805 (2012)

JMK212BJ106K

Ceramic, X5R

Taiyo-Yuden

6.3V

0805 (2012)

C2012X5R0J106K

Ceramic, X5R

TDK

6.3V

0805 (2012)

Buck Output Ripple Management

If VIN and ILOAD increase, the output ripple associated with the Buck Regulators also increases. The figure below

shows the safe operating area. To ensure operation in the area of concern it is recommended that the system

designer circumvents the output ripple issues to install schottky diodes on the Bucks(s) that are expected to

perform under these extreme corner conditions.

(Schottky diodes are recommended to reduce the output ripple, if system requirements include this shaded area

of operation. VIN > 5.1V and ILOAD > 1.24)

Board Layout Considerations

PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance

of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss

in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or

instability.

Good layout for the converters can be implemented by following a few simple design rules.

1. Place the converters, inductor and filter capacitors close together and make the traces short. The traces

between these components carry relatively high switching currents and act as antennas. Following this rule

reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN

and GND pin.

2. Arrange the components so that the switching current loops curl in the same direction. During the first half of

each cycle, current flows from the input filter capacitor through the converter and inductor to the output filter

capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled

up from ground through the converter by the inductor to the output filter capacitor and then back through

Submit Documentation Feedback

Product Folder Links: LP3971

LP3971 데이터시트(PDF) 44 Page - Texas Instruments

LP3971 데이터시트(HTML) 44 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

데이터시트 다운로드

링크 URL