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TMS320C6472ECTZ 데이터시트(PDF) 79 Page - Texas Instruments

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부품명 TMS320C6472ECTZ
상세설명  TMS320C6472 Fixed-Point Digital Signal Processor
PDF  269 Pages
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TMS320C6472
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SPRS612G
– JUNE 2009 – REVISED JULY 2011
3.7.2
Inter-DSP Interrupt Registers (IPCGR0-IPCGR5 and IPCAR0-IPCAR5)
The IPCGRn (IPCGR0 thru IPCGR5) and IPCARn (IPCAR0 thru IPCAR5) registers facilitate inter-DSP
interrupts. This can be utilized by external hosts or C64x+ megamodules to generate interrupts to other
DSPs. A write of 1 to the IPCG field of IPCGRn register generates an interrupt pulse to C64x+
Megamodulen (n = 0-5). These registers also provide a source ID, by which up to 28 different sources of
interrupts can be identified.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SRCS27
SRCS26
SRCS25
SRCS24
SRCS23
SRCS22
SRCS21
SRCS20
SRCS19
SRCS18
SRCS17
SRCS16
SRCS15
SRCS14
SRCS13
SRCS12
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
15
14
13
12
11
10
9
8
7
6
5
4
3
1
0
SRCS11
SRCS10
SRCS9
SRCS8
SRCS7
SRCS6
SRCS5
SRCS4
SRCS3
SRCS2
SRCS1
SRCS0
Reserved
IPCG
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R-000
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 3-9. IPC Generation Registers (IPCGR0-IPCGR5)
Table 3-14. IPC Generation Registers (IPCGR0-IPCGR5) Field Descriptions
Bit
Field
Value
Description
31:4
SRCS[27:0]
Write:
0
No effect
1
Set register bit
Read:
Returns current value of internal register bit
3:1
Reserved
Reserved
0
IPCG
Write:
0
No effect
1
Create an inter-DSP interrupt pulse to the corresponding C64x+ megamodule (C64x+
Megamodule0 for IPCGR0, etc.)
Read:
Returns 0, no effect
Copyright
© 2009–2011, Texas Instruments Incorporated
Device Configuration
79
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