TMS28F008AST datasheet(10/52 Pages) TI1

10 / 52 page

TMS28F008Axy,TMS28F800Axy

1048576 BY 8BIT/524288 BY 16BIT

AUTOSELECT BOOT BLOCK FLASH MEMORIES

SMJS851A − NOVEMBER 1997 − REVISED MARCH 1998

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

architecture

The TMS28F008Axy and TMS28F800Axy use a blocked architecture to allow independent erasure of selected

memory blocks. The block to be erased is selected by using any valid address within that block.

block memory maps (’28F800Axy 16-bit configuration)

The TMS28F800Axy is available with the block architecture mapped in either of two configurations: the boot

block located at the top or at the bottom of the memory array, as required by different microprocessors. The

TMS28F800AxB (bottom boot block) is mapped with the 8K-word boot block located at the low-order address

range (00000h to 01FFFh). The TMS28F800AxT (top boot block) is inverted with respect to the TMS28F800AxB

with the boot block located at the high-order address range (7E000h to 7FFFFh). Both of these address ranges

are for word-wide mode. Figure 1 and Figure 2 show the memory maps for these configurations.

block memory maps (’28F008Axy and ’28F800Axy 8-bit configuration)

The TMS28F008Axy and TMS28F800Axy are available with the block architecture mapped in either of two

configurations: the boot block located at the top (e.g., TMS28F008AxT) or at the bottom (e.g., TMS28F008AxB)

of the memory array, as required by different microprocessors. The ’28F008AxB and ’28F800AxB (8-bit) are

mapped with 16K-byte boot block located at the low-order address range (00000h to 03FFFh). The

TMS28F008AxT and TMS28F800AxT (8-bit) are inverted with respect to the TMS28F008AxB models with the

boot block located at the higher-order address range (FC000h to FFFFFh).

TMS28F008AST 데이터시트(PDF) 10 Page - Texas Instruments