MCP14A0153_15 datasheet(11/30 Pages) MICROCHIP

11 / 30 page

 2015 Microchip Technology Inc.

DS20005470A-page 11

MCP14A0153/4/5

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Output Pins (OUT A/OUT A,

OUT B/OUT B)

The outputs are CMOS push-pull circuits that are

capable of sourcing and sinking 1.5A of peak current

(VDD = 18V). The low output impedance ensures the

gate of the external MOSFET stays in the intended

state even during large transients. This output also has

a reverse current latch-up rating of 500 mA.

3.2

Device Ground Pin (GND)

GND is the device return pin for the input and output

stages. The GND pin should have a low-impedance

connection to the bias supply source return. When the

capacitive load is being discharged, high peak currents

will flow through the ground pin.

3.3

Device Enable Pins (EN A,EN B)

The MOSFET driver device enable pins are

high-impedance inputs featuring low threshold levels.

The enable inputs also have hysteresis between the

high and low input levels, allowing them to be driven

from slow rising and falling signals and to provide noise

immunity. Driving the enable pins below the threshold

will disable the corresponding output of the device,

pulling OUT/OUT low, regardless of the status of the

Input pin. Driving the enable pins above the threshold

allows normal operation of the OUT/OUT pin based on

the status of the Input pin. The enable pins utilize

internal pull up resistors, allowing the pins to be left

floating for standard driver operation.

3.4

Control Input Pins (IN A,IN B)

The MOSFET driver control inputs are high-impedance

inputs featuring low threshold levels. The Inputs also

have hysteresis between the high and low input levels,

allowing them to be driven from slow rising and falling

signals and to provide noise immunity.

3.5

Supply Input Pin (VDD)

VDD is the bias supply input for the MOSFET driver and

has a voltage range of 4.5V to 18V. This input must be

decoupled to ground with a local capacitor. This bypass

capacitor provides a localized low-impedance path for

the peak currents that are provided to the load.

3.6

Exposed Metal Pad Pin (EP)

The exposed metal pad of the TDFN package is

internally connected to GND. Therefore, this pad

should be connected to a Ground plane to aid in heat

removal from the package.

TABLE 3-1:

PIN FUNCTION TABLE

MCP14A0153, MCP14A0153, MCP14A0153

Symbol

Description

2x3 TDFN

MSOP/SOIC

EN A

Enable - Channel A

IN A

Input - Channel A

GND

Device Ground

IN B

Input - Channel B

OUT B/OUT B

Output - Channel B

VDD

Supply Input

OUT A/OUT A

Output - Channel A

EN B

Enable - Channel B

—

Exposed Thermal Pad (GND)

MCP14A0153 데이터시트(PDF) 11 Page - Microchip Technology

MCP14A0153 데이터시트(HTML) 11 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

데이터시트 다운로드

링크 URL