 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
VT8231 데이터시트(PDF) 82 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
VT8231 데이터시트(HTML) 82 Page - List of Unclassifed Manufacturers |
|
|
82 / 132 page  VT8231 Preliminary Revision 0.8 October 29, 1999 -76- Function 1 Registers - Enhanced IDE Controller 7HFKQRORJLHV ,QF :H &RQQHFW :H &RQQHFW Offset 83-80 – Primary S/G Descriptor Address ............RW Offset 8B-88 – Secondary S/G Descriptor Address ........RW Offset C3-C0 – PCI PM Block 1 .......................................RO 31-0 PCI PM Block 1.......................... always reads 0201h Offset C7-C4 – PCI PM Block 2 .......................................RO 31-2 Reserved ........................................ always reads 0 1-0 Power State 00 On .....................................................default 01 Off 1x -reserved- IDE I/O Registers These registers are compliant with the SFF 8038I v1.0 standard. Refer to the SFF 8038I v1.0 specification for further details. I/O Offset 0 - Primary Channel Command I/O Offset 2 - Primary Channel Status I/O Offset 4-7 - Primary Channel PRD Table Address I/O Offset 8 - Secondary Channel Command I/O Offset A - Secondary Channel Status I/O Offset C-F - Secondary Channel PRD Table Address |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
