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PCM3500E/2K 데이터시트(PDF) 12 Page - Texas Instruments |
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PCM3500E/2K 데이터시트(HTML) 12 Page - Texas Instruments |
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12 / 26 page ![]() ® 12 PCM3500 SYSTEM CLOCK AND RESET/ POWER DOWN SYSTEM CLOCK INPUT AND OUTPUT The PCM3500 requires a system clock for operating the digital filters and delta-sigma data converters. The system clock may be supplied from an external master clock or generated using the on-chip crystal oscillator cir- cuit. Figure 1 shows the required connections for external and crystal clock operation. The system clock must operate at 512 times the sampling frequency, fS, with sampling frequencies from 7.2kHz to 26kHz. This gives an effective system clock frequency range of 3.6864MHz to 13.312MHz. Table I shows system clock frequencies for common sam- pling frequencies. For external clock operation, XTI (pin 17) or SCKIO (pin 15) is driven by a master clock source. If SCKIO is used as the system clock input, then XTI must be connected to ground. SAMPLING FREQUENCY (kHz) SYSTEM CLOCK FREQUENCY (MHz) 8 4.096 11.025 5.6448 16 8.192 22.05 11.2896 24 12.288 TABLE I. System Clock Frequencies for Common Sam- pling Frequencies. FIGURE 1. System Clock Generation. For either case, XTO (pin 16) should be left open. The system clock source should be free of noise and exhibit low phase jitter in order to obtain optimal dynamic performance from the PCM3500. Figure 2 shows the system clock timing requirements associated with an external master clock. For crystal oscillator operation, a crystal is connected be- tween XTI (pin 17) and XTO (pin 16), along with the necessary load capacitors (10pF to 33pF per pin, as shown in Figure 1). A fundamental-mode, parallel resonant crystal is required. FIGURE 2. External System Clock Timing Requirements. C 1 C 2 C 1, C2 = 10pF to 33pF XTI R Crystal XTO PCM3500 SCKIO CRYSTAL RESONATOR CONNECTION External Clock External Clock XTI XTO R PCM3500 EXTERNAL CLOCK INPUT-XTI (XTO must be open) SCKIO XTI XTO R PCM3500 EXTERNAL CLOCK INPUT-SCKIO (XTO must be open) SCKIO System Clock Pulse Width HIGH t CLKIH 20ns (min) System Clock Pulse Width LOW t CLKIL 20ns (min) t CLKIH t CLKIL 1/512f S 0.7V DD "H" XTI or SCKIO "L" 0.3V DD |
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