P89C668 datasheet(17/89 Pages) PHILIPS

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Philips Semiconductors

Product data

P89C660/P89C662/P89C664/

P89C668

80C51 8-bit Flash microcontroller family

16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM

2002 Oct 28

INTERNAL BUS

BSD7

S1DAT

ACK

SCL

SDA

SHIFT PULSES

SU00969

Figure 6. Serial Input/Output Configuration

SHIFT IN

SDA

SCL

SHIFT ACK & S1DAT

ACK

(2)

(1)

S1DAT

SHIFT BSD7

BSD7

(3)

LOADED BY THE CPU

(1) Valid data in S1DAT

(2) Shifting data in S1DAT and ACK

(3) High level on SDA

SHIFT OUT

SU00970

Figure 7. Shift-in and Shift-out Timing

In the following text, it is assumed that ENS1 = “1”.

The “START” Flag, STA: STA = “1”: When the STA bit is set to

enter a Master mode, the SIO1 hardware checks the status of the

I2C bus and generates a START condition if the bus is free. If the

bus is not free, then SIO1 waits for a STOP condition (which will free

the bus) and generates a START condition after a delay of half a

clock period of the internal serial clock generator.

If STA is set while SIO1 is already in a Master mode and one or

more bytes are transmitted or received, SIO1 transmits a repeated

START condition. STA may be set at any time. STA may also be set

when SIO1 is an addressed slave.

STA = “0”: When the STA bit is reset, no START condition or

repeated START condition will be generated.

The STOP Flag, STO: STO = “1”: When the STO bit is set while

SIO1 is in a Master mode, a STOP condition is transmitted to the

I2C bus. When the STOP condition is detected on the bus, the SIO1

hardware clears the STO flag. In a Slave mode, the STO flag may

be set to recover from an error condition. In this case, no STOP

condition is transmitted to the I2C bus. However, the SIO1 hardware

behaves as if a STOP condition has been received and switches to

the defined “not addressed” Slave Receiver mode. The STO flag is

automatically cleared by hardware.

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