DP7112 datasheet(5/10 Pages) COPAL

5 / 10 page

DP7112

Table 4. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

POWER SUPPLY

VCC

Operating Voltage Range

2.5

–

ICC1

Supply Current (Increment)

VCC = 6 V, f = 1 MHz, IW = 0

–

200

VCC = 6 V, f = 250 kHz, IW = 0

–

100

ICC2

Supply Current (Write)

Programming, VCC = 6 V

–

1000

VCC = 3 V

–

500

ISB1 (Note 4)

Supply Current (Standby)

CS = VCC

0.3 V

U/D, INC = VCC

0.3 V or GND

–

150

LOGIC INPUTS

IIH

Input Leakage Current

VIN = VCC

–

IIL

Input Leakage Current

VIN = 0 V

–

VIH1

TTL High Level Input Voltage

4.5 V

VCC

5.5 V

–

VCC

VIL1

TTL Low Level Input Voltage

–

0.8

VIH2

CMOS High Level Input Voltage

2.5 V

VCC

6 V

VCC x 0.7

–

VCC + 0.3

VIL2

CMOS Low Level Input Voltage

0.3

–

VCC x 0.2

POTENTIOMETER CHARACTERISTICS

RPOT

Potentiometer Resistance

10 Device

50 Device

00 Device

100

Pot. Resistance Tolerance

VRH

Voltage on RH pin

VCC

VRL

Voltage on RL pin

VCC

Resolution

INL

Integral Linearity Error

2 A

0.5

LSB

DNL

Differential Linearity Error

2 A

0.25

0.5

LSB

ROUT

Buffer Output Resistance

0.05 VCC

VWB

0.95 VCC,

VCC = 5 V

IOUT

Buffer Output Current

0.05 VCC

VWB

0.95 VCC,

VCC = 5 V

TCRPOT

TC of Pot Resistance

300

ppm/ C

TCRATIO

Ratiometric TC

ppm/ C

CRH/CRL/CRW

Potentiometer Capacitances

8/8/25

Frequency Response

Passive Attenuator, 10 k

1.7

MHz

VWB(SWING)

Output Voltage Range

IOUT 100 A, VCC = 5 V

0.01 VCC

0.99 VCC

3. This parameter is tested initially and after a design or process change that affects the parameter.

4. Latch up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V

5. IW = source or sink

6. These parameters are periodically sampled and are not 100% tested.

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