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TMD27253M 데이터시트(PDF) 25 Page - ams AG |
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TMD27253M 데이터시트(HTML) 25 Page - ams AG |
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25 / 50 page ![]() ams Datasheet Page 25 [v1-11] 2016-Sep-20 Document Feedback TMD2725 − Register Description CFG0 Register (Address 0x8D) Figure 32: CFG0 Register The wait timer is implemented using a down counter. Wait time = (value +1) x 2.8ms. If WLONG is enabled then Wait time = (value +1) x 2.8ms x 12. Addr: 0x8D CFG0 Bit Bit Name Default Access Bit Description 7:3 Reserved 10000 RW This field must be set to the default value. 2WLONG 0 RW When Wait Long is asserted the wait period as set by WTIME is increased by a factor of 12. 1:0 Reserved 0 RW This field must be set to the default value. |
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