ST92185B2 datasheet(62/178 Pages) STMICROELECTRONICS

62 / 178 page

62/178

ST92185B - TIMING AND CLOCK CONTROLLER

5 TIMING AND CLOCK CONTROLLER

5.1 FREQUENCY MULTIPLIERS

Three on-chip frequency multipliers generate the

proper frequencies for: the Core/Real time Periph-

erals, the Display related time base.

For both the Core and the Display frequency mul-

tipliers, a 4 bit programmable feed-back counter

allows the adjustment of the multiplying factor to

the application need (a 4 MHz or 8 MHz crystal is

assumed).

Figure 33. Timing and Clock Controller Block Diagram

Frequency

Multiplier

FML(3:0)

FMEN

Xtal

Oscillator

Asynch.

Handler

FMSL

Main Clock Controller

Divide

by 2

MCFM

OSCIN

OSCOUT

Fimf

Divide

by 2

SLDIV2

FMEN

Frequency

Multiplier

Skew Corrector

Synchronized DOTCK / 2 to Display

SKWL(3:0)

SKWEN

Hsync

SKHPLS

PXFM

(Synchronized DOTCK)

Divide

by 2

(2X Pixel clock for 1X width characters)

4 MHz real time

Divide

by 2

to Display Storage RAM (TRI)

Div-2

MODER.5

SKDIV2

VR02095A

Async.

Handler

Memory Wait

BREQ

WFI

CPUCLK

Prescaler

1 to 8

Clock

Control

INTCLK

ST9 Clock Control Unit (RCCU)

ST92185B2 데이터시트(PDF) 62 Page - STMicroelectronics

ST92185B2 데이터시트(HTML) 62 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL