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MIC45116 데이터시트(PDF) 28 Page - Microchip Technology |
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MIC45116 데이터시트(HTML) 28 Page - Microchip Technology |
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28 / 42 page ![]() MIC45116 DS20005571A-page 28 2016 Microchip Technology Inc. 7.0 SIMPLIFIED PCB DESIGN RECOMMENDATIONS 7.1 Periphery I/O Pad Layout and Large Pad for Exposed Heatsink The board design should begin with copper/metal pads that sit beneath the periphery leads of a mounted QFN. The board pads should extend outside the QFN package edge a distance of approximately 0.20 mm per side: EQUATION 7-1: After completion of the periphery pad design, the larger exposed pads will be designed to create the mounting surface of the QFN exposed heatsink. The primary transfer of heat out of the QFN will be directly through the bottom surface of the exposed heatsink. To aid in the transfer of generated heat into the PCB, the use of an array of plated through-hole vias beneath the mounted part is recommended. The typical via hole diameter is 0.30 mm to 0.35 mm, with center-to-center pitch of 0.80 mm to 1.20 mm. FIGURE 7-1: Package Bottom View vs. PCB Recommended Exposed Metal Trace. Please note the exposed metal trace is a “mirror image” of the package bottom view. TotalPadLength 8mm 0.20mm 2sides 8.4mm = + = |
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