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MIC28511 데이터시트(PDF) 25 Page - Microchip Technology

부품명 MIC28511
상세설명  60VIN, 3A Synchronous Buck Regulator
PDF  34 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC28511 데이터시트(HTML) 25 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005520A-page 25
MIC28511
EQUATION 5-17:
With the feed-forward capacitor, the feedback
voltage ripple is very close to the output voltage
ripple.
EQUATION 5-18:
FIGURE 5-5:
Inadequate Ripple at FB.
• Virtually no ripple at the FB pin voltage due to the
very low ESR of the output capacitors.
In this situation, the output voltage ripple is less than
20 mV. Therefore, additional ripple is injected into
the FB pin from the switching node SW via a resistor
RINJ and a capacitor CINJ, as shown in Figure 5-6.
FIGURE 5-6:
Invisible Ripple at FB.
The injected ripple is calculated via:
EQUATION 5-19:
EQUATION 5-20:
In Equation 5-19 and Equation 5-20, it is assumed that
the time constant associated with CFF must be much
greater than the switching period:
EQUATION 5-21:
If the voltage divider resistors R1 and R2 are in the kΩ
range, a CFF of 1 nF to 100 nF can easily satisfy the
large time constant requirements. Also, a 100 nF
injection capacitor CINJ is used in order to be
considered as short for a wide range of the
frequencies.
The process of sizing the ripple injection resistor and
capacitors is as follows.
•Select CFF to feed all output ripples into the
feedback pin and make sure the large time
constant assumption is satisfied. Typical choice of
CFF is 1 nF to 100 nF if R1 and R2 are in the kΩ
range.
•Select RINJ according to the expected feedback
voltage ripple using Equation 5-22:
EQUATION 5-22:
The value of RINJ is calculated using Equation 5-23.
EQUATION 5-23:
•Select CINJ as 100 nF, which could be considered
as short for a wide range of the frequencies.
R1
C
FF
10
f
SW
--------
V
FB PP

ESR
I
LPP

MIC28511
SW
FB
R1
R2
ESR
C
OUT
C
FF
L
MIC28511
SW
FB
R1
R2
ESR
C
OUT
C
FF
R
INJ
C
INJ
L
V
FB PP

V
IN
K
div
D
1
D
–

1
f
SW
-----------------
=
Where:
VIN
Power stage input voltage
D
Duty cycle
fSW
Switching frequency
τ
(R1//R2//RINJ) x CFF
K
div
R1//R2
R
INJ
R1//R2
+
-----------------------------------
=
1
f
SW
-----------------
T
---
=1
«
K
div
V
FB PP

V
IN
-----------------------
f
SW
D
1
D
–

----------------------------
=
R
INJ
R1//R2

1
K
div
----------
1
–


=



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