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MCP19124 데이터시트(PDF) 70 Page - Microchip Technology

부품명 MCP19124
상세설명  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
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제조업체  MICROCHIP [Microchip Technology]
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MCP19124 데이터시트(HTML) 70 Page - Microchip Technology

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MCP19124/5
DS20005619A-page 70
 2016 Microchip Technology Inc.
10.1.1
READING PROGRAM MEMORY
AS DATA
There are two methods of accessing constants in
program memory. The first method is to use tables of
RETLW
instructions. The second method is to set a
Files Select Register (FSR) to point to the program
memory.
10.1.1.1
RETLW Instruction
The RETLW instruction can be used to provide access
to the tables of constants. The recommended way to
create such tables is shown in Example 10-1.
EXAMPLE 10-1:
RETLW INSTRUCTION
The BRW instruction makes this type of table very
simple to implement. If your code must remain portable
with previous generations of microcontrollers, then the
BRW
instruction is not available, so the older table-read
method must be used.
10.2
Data Memory Organization
The data memory (refer to Figure 10-1) is partitioned
into four banks, which contain the General Purpose
Registers (GPR) and the Special Function Registers
(SFR). The Special Function Registers are located in
the first 32 locations of each bank. Register locations
20h-7Fh in Bank 0, A0h-EFh in Bank 1, 120h-16Fh in
Bank 2 and 1A0h-1EFh in Bank 3 are General Purpose
Registers, implemented as static RAM. All other RAM
is unimplemented and returns ‘0’ when read. The
RP<1:0> bits in the STATUS register are the bank
select bits.
EXAMPLE 10-2:
BANK SELECT
To move values from one register to another register,
the value must pass through the W register. This
means that for all register-to-register moves, two
instruction cycles are required.
The entire data memory can be accessed either
directly or indirectly. Direct addressing may require the
use of the RP<1:0> bits. Indirect addressing requires
the use of the FSR. Indirect addressing uses the
Indirect Register Pointer (IRP) bit in the STATUS
register for access to the Bank0/Bank1 or the
Bank2/Bank3 areas of data memory.
10.2.1
GENERAL PURPOSE REGISTER
FILE
The register file is organized as 64 x 8 in the
MCP19124/5. Each register is accessed, either directly
or indirectly, through the FSR (refer to Section 10.5
“Indirect Addressing, INDF and FSR Registers”).
constants
BRW
;Add Index in W to
;program counter to
;select data
RETLW DATA0
;Index0 data
RETLW DATA1
;Index1 data
RETLW DATA2
RETLW DATA3
my_function
;… LOTS OF CODE…
MOVLW
DATA_INDEX
call constants
;… THE CONSTANT IS IN W
RP1
RP0
00
 Bank 0 is selected
01
 Bank 1 is selected
10
 Bank 2 is selected
11
 Bank 3 is selected



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