MCP19124 datasheet(84/236 Pages) MICROCHIP

84 / 236 page

MCP19124/5

DS20005619A-page 84

 2016 Microchip Technology Inc.

12.1

Power-On Reset (POR)

The on-chip POR circuit holds the chip in Reset until

VDD has reached a high enough level for proper

operation. To take advantage of the POR, simply

connect the MCLR pin through a resistor to VDD. This

will eliminate external RC components usually needed

to create Power-On Reset.

When the device starts normal operation (exits the

Reset condition), device operating parameters (i.e.,

voltage, frequency, temperature, etc.) must be met to

ensure proper operation. If these conditions are not

met, the device must be held in Reset until the

operating conditions are met.

12.2

MCLR

MCP19124/5 have a noise filter in the MCLR Reset

path. The filter will detect and ignore small pulses.

It should be noted that a WDT Reset does not drive

MCLR pin low.

Voltages applied to the MCLR pin that exceed its

specification can result in both MCLR Resets and

excessive current beyond the device specification

during the ESD event. For this reason, Microchip

recommends that the MCLR pin no longer be tied

directly to VDD. The use of a Resistor-Capacitor (RC)

network, as shown in Figure 12-2, is suggested.

An internal MCLR option is enabled by clearing the

MCLRE bit in the CONFIG register. When MCLRE = 0,

the Reset signal to the chip is generated internally.

When MCLRE = 1, the MCLR pin becomes an external

Reset input. In this mode, the MCLR pin has a weak

pull-up to VDD.

FIGURE 12-2:

RECOMMENDED MCLR

CIRCUIT

TABLE 12-2:

STATUS/PCON BITS AND THEIR SIGNIFICANCE

POR

BOR

Condition

x11

Power-On Reset

011

Brown-Out Reset

u0u

WDT Reset

u00

WDT Wake-Up

uuu

MCLR Reset during normal operation

u10

MCLR Reset during Sleep

Legend: u = unchanged, x = unknown

VDD

MCLR

 (or greater)

0.1 µF

(optional, not critical)

100



(needed with

SW1

(optional)

capacitor)

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