 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
STM32F756VG 데이터시트(PDF) 158 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32F756VG 데이터시트(HTML) 158 Page - STMicroelectronics |
|
|
158 / 228 page  Electrical characteristics STM32F756xx 158/228 DocID027589 Rev 4 Figure 46. SPI timing diagram - slave mode and CPHA = 0 tsu(MI) Data input setup time Master mode 5.5 - - ns tsu(SI) Slave mode 4 - - th(MI) Data input hold time Master mode 4 - - th(SI) Slave mode 2 - - ta(SO) Data output access time Slave mode 7 - 21 tdis(SO) Data output disable time Slave mode 5 - 12 tv(SO) Data output valid time Slave mode 2.7≤VDD≤3.6V - 6.5 10 Slave mode 1.71≤VDD≤3.6V - 6.5 13 tv(MO) Master mode - 2 4 th(SO) Data output hold time Slave mode 1.71≤VDD≤3.6V 5.5 - - th(MO) Master mode 0 - - 1. Guaranteed by characterization results. 2. Excepting SPI1 with SCK IO pin mapped on PA5. In this configuration, Maximum achievable frequency is 40MHz. 3. Maximum Frequency of Slave Transmitter is determined by sum of Tv(SO) and Tsu(MI) intervals which has to fit into SCK level phase preceding the SCK sampling edge.This value can be achieved when it communicates with a Master having Tsu(MI)=0 while signal Duty(SCK)=50%. Table 76. SPI dynamic characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
