STM32L475RC datasheet(17/193 Pages) STMICROELECTRONICS

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STM32L475xx

Functional overview

The whole non-volatile memory embeds the error correction code (ECC) feature supporting:

•

single error detection and correction

•

double error detection.

•

The address of the ECC fail can be read in the ECC register

3.5

Embedded SRAM

STM32L475xx devices feature up to 128 Kbyte of embedded SRAM. This SRAM is split into

two blocks:

•

96 Kbyte mapped at address 0x2000 0000 (SRAM1)

•

32 Kbyte located at address 0x1000 0000 with hardware parity check (SRAM2).

This block is accessed through the ICode/DCode buses for maximum performance.

These 32 Kbyte SRAM can also be retained in Standby mode.

The SRAM2 can be write-protected with 1 Kbyte granularity.

The memory can be accessed in read/write at CPU clock speed with 0 wait states.

3.6

Firewall

The device embeds a Firewall which protects code sensitive and secure data from any

access performed by a code executed outside of the protected areas.

Each illegal access generates a reset which kills immediately the detected intrusion.

The Firewall main features are the following:

•

Three segments can be protected and defined thanks to the Firewall registers:

–

Code segment (located in Flash or SRAM1 if defined as executable protected

area)

–

Non-volatile data segment (located in Flash)

–

Volatile data segment (located in SRAM1)

•

The start address and the length of each segments are configurable:

–

code segment: up to 1024 Kbyte with granularity of 256 bytes

–

Non-volatile data segment: up to 1024 Kbyte with granularity of 256 bytes

–

Volatile data segment: up to 96 Kbyte with a granularity of 64 bytes

•

Specific mechanism implemented to open the Firewall to get access to the protected

areas (call gate entry sequence)

•

Volatile data segment can be shared or not with the non-protected code

•

Volatile data segment can be executed or not depending on the Firewall configuration

The Flash readout protection must be set to level 2 in order to reach the expected level of

protection.

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